Introduction to ABC
Join us for our upcoming Future Computing Seminar Series
Speaker: Dr. Alan Mishchenko, UC Berkeley
Date: September 24th, 2024, 15:30 CET
Where: GLC E29.2 & external page Online
Abstract:
This talk will review the development of logic synthesis from manipulating small Boolean functions using truth tables, through the discovery of efficient heuristic methods for sum-of-product minimization and algebraic factoring applicable to medium-sized circuits, to the present-day automated design flow, which can process digital designs with millions of logic gates. The talk will discuss the main computation engines and packages used in logic synthesis, such as circuit representation in the form of And-Inverter-Graphs, recent improvements to the traditional minimization and factoring methods, priority-cut-based technology mapping into standard-cells and lookup-tables, and don't-care-based optimization using Boolean satisfiability. We will also discuss the importance of formal verification for validating the results produced by the synthesis tools, and the deep synergy between algorithms and data-structures used in synthesis and verification. In the course of this talk, the presenter will share his 14-year experience of being part of an academic research group with close connections to companies in Silicon Valley, both design houses and CAD tool vendors.
Bio:
Alan graduated with M.S. from Moscow Institute of Physics and Technology (Moscow, Russia) in 1993 and received his Ph.D. from Glushkov Institute of Cybernetics (Kiev, Ukraine) in 1997. In 2002, Alan joined the EECS Department at University of California, Berkeley, where he is currently a full researcher. His research is in computationally efficient logic synthesis, formal verification, and machine learning.