Elephant Hill Intro Workshop
Join us for our upcoming Future Computing Seminar Series
Speaker: Michael Rogenmoser (ETHZ) & Pasquale Davide Schiavone (EPFL)
Date: Friday, Sept 25, 13:30 Zurich time (CEST)
Where: OAT S 17
Abstract:
High-performance processor cores are key building blocks for modern systems, yet there are few open-source examples, with the most prominent and performant, XiangShan (https://github.com/OpenXiangShan/XiangShan), written in Chisel. Over the past months, we have been leveraging agentic AI to bring XiangShan into SystemVerilog. The aim is not to reproduce how CIRCT’s FIRRTL already simplifies, flattens, and uniquifies the design, but to obtain a configurable, open-source processor core that commercial and open-source EDA tools can directly understand and that we can modify, build on, and use to perform new research. Join us for an introduction to the methodology behind our design and the preliminary results of our work.
Speaker Bio:
Michael Rogenmoser received his BSc and MSc degrees from ETH Zürich in 2020 and 2021, respectively. In 2021, he joined the
Integrated Systems Laboratory of ETH Zürich as a PhD candidate under the supervision of Prof. Dr. Luca Benini, and defended in August of 2026. His research interests include fault-tolerant architectures for space, multicore processors, reliability in systems-on-chip (SoCs), and, more recently, agent-first SoC development.
Speaker Bio:
Pasquale Davide Schiavone (Davide) is a Scientist at the Swiss Federal Institute of Technology Lausanne (EPFL) and Director of Engineering of the OpenHW Group. He was previously working in the ESL lab at EPFL as a PostDoc from 2022 to 2025. He obtained the Ph.D. title at the Integrated Systems Laboratory of ETH Zurich in the Digital Systems group in 2020 and the BSc. and MSc. from "Politecnico di Torino" in computer engineering in 2013 and 2016, respectively. His main activities are the RISC-V CPU design and low-power energy-efficient heterogeneous systems for smart embedded systems and edge-computing devices.