Track 2 - Customizing RISC-V Based Microcontrollers

Hands on tutorials to demonstrate how to add your own extensions to an existing 32bit RISC-V microcontroller system, running on an FPGA.

You will learn:

• An introduction to microcontroller architectures (RISC-V, Peripherals, Memories)
• Open source microcontroller architectures available through the PULP eco-system
• FPGA design flow for FPGAs, mapping the RTL code to FPGA
• Getting your code run on the system, cross compiling, RTL simulation, emulation
• Alternatives to expand the capabilities, accelerators, instruction set extensions
• Cost benefit analysis of extensions

Course will be in English with support from UNIBO, ETH Zurich

Nine 2-hour modules with > 50% hands on exercises in computer laboratory.

Limited to 25 participants

Prerequisites: General knowledge on RTL design, basics of computer architectures/programming